This invention relates to the field of serial memories. Such memories are typically used as buffer memories to receive input data elements at one rate, and to output at a different rate the stored data elements in a sequence defined by the order in which they were written into the buffer memory. Generally, there are two types of such buffer memories. One type is based on shifting data elements through multiple cells in the buffer memory. The other type is random access memory (RAM) based, not requiring shifting of data elements through multiple cells. This invention specifically relates to RAM based serial memories. In prior art buffer memories of that type, the time required to complete a read is long, because the particular memory cell containing a requested data element must be selected (memory cell activated and stored signal imparted onto data bit lines), and the imparted signal must be sensed by an amplifier before the data element can be outputted from the buffer memory. Thus, the access time in such prior art systems is long.